CY308 Pinouts
CY308 DIP Pinout
CY308/J PLCC Pinout
CY308/Q QFP Pinout*
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CY308 Dip Pin# |
CY308/J PLCC Pin# |
CY308/Q QFP* Pin# |
Pin Name | I/O | Description |
- | 1 | 39 | NC | no internal connection | |
1 | 2 | 40 | CE0 | O | Display Module Chip-Enable bit 0 |
2 | 3 | 41 | CE1 | O | Display Module Chip-Enable bit 1 |
3 | 4 | 42 | CE2 | O | Display Module Chip-Enable bit 2 |
4 | 5 | 43 | CE3 | O | Display Module Chip-Enable bit 3 |
5 | 6 | 44 | CE4 | O | Display Module Chip-Enable bit 4 |
6 | 7 | 1 | CE5 | O | Display Module Chip-Enable bit 5 |
7 | 8 | 2 | CE6 | O | Display Module Chip-Enable bit 6 |
8 | 9 | 3 | CE7 | O | Display Module Chip-Enable bit 7 |
9 | 10 | 4 | Restart | I | Resets CY308 when high |
10 | 11 | 5 | RxD | I | Received Serial Data line |
- | 12 | 6 | NC | no internal connection | |
11 | 13 | 7 | TxD | O | Transmitted Serial Data Line |
12 | 14 | 8 | Clock Gate | I/O | Selects Clock function: Hi=Run, Lo=Stop |
13 | 15 | 9 | IO Request/ | I/O | Parallel handshake input; else Serial baud select: Lo=300, Hi=2400, Z=9600 |
14 | 16 | 10 | FPL/ | O | Forced parallel load output signal |
15 | 17 | 11 | Busy/ | I/O | Parallel handshake acknowledgement |
16 | 18 | 12 | WR/ | O | Write Strobe to LED module |
17 | 19 | 13 | RD/ | O | Read Strobe to LED module |
18 | 20 | 14 | Xtal2 | I | Crystal oscillator connection |
19 | 21 | 15 | Xtal1 | I | Crystal oscillator connection |
20 | 22 | 16 | Vss | I | Ground connection for CY308 |
- | 23 | 17 | NC | no internal connection | |
21 | 24 | 18 | Addr0 | O | Display Module address bit 0 |
22 | 25 | 19 | Addr1 | O | Display Module address bit 1 |
23 | 26 | 20 | Addr2 | O | Display Module address bit 2 |
24 | 27 | 21 | Addr3 | O | Display Module address bit 3 |
25 | 28 | 22 | Addr4 | O | Display Module address bit 4 |
26 | 29 | 23 | Addr5 | I/O | Display Module address bit 5 Lo=4-char module, else 8-char module |
27 | 30 | 24 | Clock Alarm | O | Clock overflow or Period indication |
28 | 31 | 25 | Disp Reset | O | Display Module reset signal |
29 | 32 | 26 | Reserved | O | do not connect |
30 | 33 | 27 | Clock Out | O | clock output, 1/6 crystal rate |
- | 34 | 28 | NC | no internal connection | |
31 | 35 | 27 | Vdd | I | +5v |
32 | 36 | 30 | D 7 | I/O | Parallel Data Bus bit 7 (MSB) |
33 | 37 | 31 | D 6 | I/O | Parallel Data Bus bit 6 |
34 | 38 | 32 | D 5 | I/O | Parallel Data Bus bit 5 |
35 | 39 | 33 | D 4 | I/O | Parallel Data Bus bit 4 |
36 | 40 | 34 | D 3 | I/O | Parallel Data Bus bit 3 |
37 | 41 | 35 | D 2 | I/O | Parallel Data Bus bit 2 |
38 | 42 | 36 | D 1 | I/O | Parallel Data Bus bit 1 |
39 | 43 | 37 | D 0 | I/O | Parallel Data Bus bit 0 (LSB) |
40 | 44 | 38 | Vcc (+ 5V) | I | +5 volt power supply |
* QFP Notes:
- While the numbering scheme of the QFP pinout differs from the PLCC,
the physical location of functional pins will be identical on both packages.
- The QFP package is currently only available in 1000 quantity minimums.