CY550 Pinout
CY550 DIP Pinout
CY550/J PLCC Pinout
CY550/Q QFP Pinout*
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CY550 Dip Pin# |
CY550/J PLCC Pin# |
CY550/Q QFP* Pin# |
Pin Name | I/O | Description |
- | 1 | 39 | NC | no internal connection | |
1 | 2 | 40 | Pulse/ | O | Step pulse output |
2 | 3 | 41 | CCW | I/O | Step direction |
3 | 4 | 42 | Stopped | O | Motion status, Lo=stepping |
4 | 5 | 43 | CW Limit/ | I | Clockwise step limit reached |
5 | 6 | 44 | CCW Limit/ | I | Counter Clockwise step limit reached |
6 | 7 | 1 | Jog | I/O | Manual stepping control |
7 | 8 | 2 | Slew/ | I/O | Slew indicator signal |
8 | 9 | 3 | Inhibit_Abort/ | I | External motion control |
9 | 10 | 4 | Reset | I | CY550 hardware reset when high |
10 | 11 | 5 | RxD | I | Received Serial Data line |
- | 12 | 6 | NC | no internal connection | |
11 | 13 | 7 | TxD | O | Transmitted Serial Data Line |
12 | 14 | 8 | CTS/ | O | Serial Clear-to-send, CY550 is ready when low |
13 | 15 | 9 | IO Request/ | I | Parallel handshake input; else Serial baud select: Lo=300, Hi=2400, Z=9600 |
14 | 16 | 10 | Xmem Sel/ | I/O | External local memory select |
15 | 17 | 11 | Busy/ | I/O | Parallel handshake acknowledgement |
16 | 18 | 12 | WR/ | O | Parallel Write Strobe |
17 | 19 | 13 | RD/ | O | Parallel Read Strobe |
18 | 20 | 14 | Xtal2 | I | Crystal oscillator connection |
19 | 21 | 15 | Xtal1 | I | Crystal oscillator connection |
20 | 22 | 16 | Vss | I | Ground connection for CY550 |
- | 23 | 17 | NC | no internal connection | |
21 | 24 | 18 | UserBit0 | I/O | User selectable function, bit 0 |
22 | 25 | 19 | UserBit1 | I/O | User selectable function, bit 1 |
23 | 26 | 20 | UserBit2 | I/O | User selectable function, bit 2 |
24 | 27 | 21 | UserBit3 | I/O | User selectable function, bit 3 |
25 | 28 | 22 | UserBit4 | I/O | User selectable function, bit 4 |
26 | 29 | 23 | UserBit5 | I/O | User selectable function, bit 5 |
27 | 30 | 24 | UserBit6 or FPL/ or DTR/ | I/O | User selectable function, bit 6 or FPL/ or DTR/ |
28 | 31 | 25 | UserBit7 or HP_Sel/ | I/O | User selectable function, bit 7 or HP_Sel/ |
29 | 32 | 26 | Reserved | O | do not connect |
30 | 33 | 27 | ALE | O | Address Latch enable |
- | 34 | 28 | NC | no internal connection | |
31 | 35 | 29 | Test | I | +5v |
32 | 36 | 30 | D 7 | I/O | Parallel Data Bus bit 7 (MSB) |
33 | 37 | 31 | D 6 | I/O | Parallel Data Bus bit 6 |
34 | 38 | 32 | D 5 | I/O | Parallel Data Bus bit 5 |
35 | 39 | 33 | D 4 | I/O | Parallel Data Bus bit 4 |
36 | 40 | 34 | D 3 | I/O | Parallel Data Bus bit 3 |
37 | 41 | 35 | D 2 | I/O | Parallel Data Bus bit 2 |
38 | 42 | 36 | D 1 | I/O | Parallel Data Bus bit 1 |
39 | 43 | 37 | D 0 | I/O | Parallel Data Bus bit 0 (LSB) |
40 | 44 | 38 | Vcc (+ 5V) | I | +5 volt power supply |
* QFP Notes:
- While the numbering scheme of the QFP pinout differs from the PLCC,
the physical location of functional pins will be identical on both packages.
- The QFP package is currently only available in 1000 quantity minimums.